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Altera_Forum
Honored Contributor
11 years agoI have the same problem when I use one separate file of constants.
Have you already found a solution to this problem? --- Quote Start --- Hello, I am trying to simulate using vwf files in Quartus 13.1 + Qsim. I create the vector waveform file and then I try to run a functional simulation, but I got the error below # ** Error: (vsim-3170) Could not find 'work.mydesign_vlg_vec_tst'. # # Error loading design Error loading design Error. I believe this vlg is related to verilog (my hardware descriptions are in vhdl). There is only one file named mydesign.vhd in my project. Any ideas of what is the problem? Thank you all --- Quote End ---