Error message while trying to compile a project with one LVDS output.
Hi, i have been trying to test LVDS functionality by creating an output as reg (not wire) and then setting its' val with a non-blocking assignment inside an always loop. I started by creating a sin...
Hello there ,
Looks like from the message you are getting error in fitter.
can you give me the device part number which you are selected in Quartus ?
thank you,
Regards,
Sree