Error in placing the HPS DDR4 EMIF

The easiest thing to do would be to use the Interface Planner tool in Quartus to find legal locations for your additional external memory interfaces. That way you can guarantee that the I/O and resources needed for the additional interfaces are available.

https://www.intel.com/content/www/us/en/programmable/products/design-software/fpga-design/quartus-prime/features/interface-planner.html