Error compiling Quartus V12 design with Quartus V15 Web Edition

I have a design that is mixed verilog and schematic. The design compiled fine in Version 12 and a targeted Aria II, but I am using Version 15 of the Web tools to compile the same design for Cyclone V and get the following error.

problem details

Error:

Internal Error: Sub-system: SGN, File: /quartus/synth/sgn/sgn_sim_prep.cpp, Line: 3200

Unknown family in sgn_clkboost_is_legal_for_family()

Stack Trace:

0x1615ca: sgn_set_check_ip_functor + 0x8d74a (synth_sgn)

0x16a601: sgn_set_check_ip_functor + 0x96781 (synth_sgn)

0x16175a: sgn_set_check_ip_functor + 0x8d8da (synth_sgn)

0x170a32: sgn_set_check_ip_functor + 0x9cbb2 (synth_sgn)

0x17077f: sgn_set_check_ip_functor + 0x9c8ff (synth_sgn)

0xd4edf: sgn_set_check_ip_functor + 0x105f (synth_sgn)

0x13172: sgn_qic_full + 0x2a2 (synth_sgn)

0x12540: qexe_apply_ini_vars + 0x2450 (comp_qexe)

0x175f2: qexe_process_cmdline_arguments + 0x2502 (comp_qexe)

0x18381: qexe_standard_main + 0xc1 (comp_qexe)

0xcad8: msg_initialize_out_of_memory_handler + 0x378 (CCL_MSG)

0xe20c: msg_set_stack_size + 0x7c (CCL_MSG)

0x5aa0: mem_gen_get_project_output_directory + 0x64 (ccl_mem)

0xc721: msg_exe_main + 0xa1 (CCL_MSG)

0x159ec: BaseThreadInitThunk + 0xc (kernel32)

0x2c540: RtlUserThreadStart + 0x20 (ntdll)

End-trace

Executable: quartus_map

Comment:

None

system information

Platform: windows64

OS name: Windows 7

OS version: 6.1

quartus ii information

Address bits: 64

Version: 14.1.0

Build: 186

Edition: Web EditionAny suggestions?