I struggled with this same "error 8" for several days on my custom design before our Altera rep helped me through it. I'm using the Intel 256P30 with an EP3C40 FPGA in an active parallel setup, so no configuration device, just flash and JTAG.
Selecting the tri state controller with 256P30 preset didn't work for me. I had to select the older CFI component with the 256P30 setup, then hook it up to an avalon master bridge and hook both up to clk, rst, etc. As Qsys suggested, I then ran the SOPC->Qsys conversion.
I set the address[0] line as virtual in the assignment editor.
In my VHDL I am manually driving the leftover flash lines needed for AP configuration like this:
flash_adv_n <= '0';
flash_clk <= '0';
flash_rst_n <= '1';
flash_wp <= '1';
flash_wait <= '0';
Have not yet seen if the AP configuration will work yet, but I am able to program the flash at least with this setup.