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As far as I see, the
cycloneiii_3c25_start_niosii_standard is using the same resources and compiles without errors. Did you import the DDR RAM design *.tcl files, particularly the pin assignments, including the output-enable-group assignments for bidirectional DDR pins?
If all necessary settings are in effect and the error would be due to an incompatible pin assignement of the Evalboard, some outputs in the B3_N0 Vref group may be declared static by assigning a ToggleRate of 0 MHz to them. They are ignored for I/O pin distance rules then.
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the error is occured yet.
the DDR RAM design *.tcl files have imported. and the direction of pins are right.
I didn't understand
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some outputs in the B3_N0 Vref group may be declared static by assigning a ToggleRate of 0 MHz to them
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and how to correct it.
Honored Contributor
