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Altera_Forum
Honored Contributor
8 years agoMy apologies, I meant 14 registers or more. I'm trying to drive 14 register with clk27M. Here is a snippet of the code with 4 registers; there are 14 registers using this clk in total.
PLL PLL(.inclk(clk50M), .c0(clkA), .c1(clkB), .c2(clkC), .c3(clkD), .locked(pll_lock)); reg [7:0] a = '0; always @ (posedge clkA) a = (some conditional statement) ? a + 1 : 0; reg[31:0][7:0] b = '0; always @ (posedge clkA) b[a[7:0]] = (some conditional statement) ? data : b[a[7:0]]; Thank you