Forum Discussion
JHill1
Occasional Contributor
Occasional ContributorError (19021): The same file name "clock_in_0" is used for different IP files
Hello All! Im curious how one fixes a hierarchical QSYS system related quartus compile error like the following given that the name "clock_in_0" was not chosen by the designer, but instead by pla...
JHill1Occasional Contributor
Occasional ContributorUsing Platform Designer to delete and recreate a newly added clock bridge, exactly the same as before including using the same block name and the same clock input export name, in my peripheral sub-component has fixed the issue.
