You put the clock rising edge check inside an if check for an enable.
Your order for control signal checks for a register inference is incorrect. It should look something like this (you can also use a template in the Quartus text editor). Note that if you're trying to create a counter (not sure if that is your intention), anglecodeunsign is going to go back to the value of AngleCode every clock cycle:
PROCESS(clock, resetn)
BEGIN
anglecodeunsign <= unsigned(AngleCode);
IF resetn = '0' THEN
anglecodeunsign <= "00000000";
ELSIF rising_edge(clk) THEN
IF enable = '1' THEN
IF sclrn = '0' THEN
anglecodeunsign <= "00000000";
ELSE
IF anglecodeunsign > "00010000" THEN
anglecodeunsign <= "00000000"
ELSE
anglecodeunsign <= anglecodeunsign + '1';
END IF;
END IF;
END IF;
END IF;
END PROCESS;