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Altera_Forum
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15 years ago

Error (10170): Verilog HDL syntax error

Having trouble with my Verilog HDL file. Fairly new at this so hopefully this is simple. Unable to compile because of this error: Error (10170): Verilog HDL syntax error at four_bit_addertb.v...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

You should show a Verilog port definition of four_bit_adder for clarity. However, if the bit identifier A[0] appears in the module's port list, it's not a port name. The port is unnamed in this case and you can't use named notation in instantiation of the module. Use positional instantiation instead, or change the port definition of the module to use simple identifiers.