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Altera_Forum
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8 years agoC:/intelFPGA_pro/17.0/quartus/bin64/encrypt_1735 --quartus --language=verilog | VHDL <file>. You can encrypt entire collection of kernel files in kernel_hdl starting from 17.0 tools. Then build the PR or flat version of the project by the Tcl script or in Quartus GUI. Our company has successfully done this IEEE_1735 encryption of IP merged with OpenCL flow.