Embedded Timing Constraints

Hello,

Are you referring to embedded timing constraints in HDL code? I believe this has been answered in another thread you've posted: https://community.intel.com/t5/Intel-Quartus-Prime-Software/SDC-directives-in-HDL/m-p/1422441#M75617

Please let me know if you have additional questions.

Regards,

Nurina

Hello,

We do not receive any response from you on the previous question/reply/answer provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

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Regards,

Nurina