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Contributor

3 years ago

Embedded Timing Constraints

Hi All, What are the Embedded Timing Constraints? How to use them? Could they be defined by designers as well? Thank you!

Regular Contributor

3 years ago

Hello,

Are you referring to embedded timing constraints in HDL code? I believe this has been answered in another thread you've posted: https://community.intel.com/t5/Intel-Quartus-Prime-Software/SDC-directives-in-HDL/m-p/1422441#M75617

Please let me know if you have additional questions.

Regards,

Nurina