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Altera_Forum
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18 years ago

Early Pin Planning (without HDL)

Here's my question: When you are doing early design pin-planning (checking I/O assignments without any HDL files), how do you enter buses? For example, I have mybus[255..0] that I want to get into ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

You can use tcl script to add the pins' location and other properties of pins. For the other properties, I think you can select all the pins once and apply same property in the pin

planner. But it looks like you need at least top level design file first.