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Altera_Forum
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15 years ago

Dynamic delay for LVDS inputs on a Cyclone 3

Hello, I have to implement an interface to a sensor chip that delivers its data on several (more than 8) LVDS lines in DDR mode along with an LVDS clock. == Details to the situation == ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

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Basic ideas about implementation of delay chains can be found in the "Advanced Synthesis Cookbook", the topic has been also discussed at Altera forum, e.g. how to tell the synthesis tool not to remove apparently redundant logic elements.

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Thanks for this link and a hint that there are people doing such funny stuff...

I will take a good look at it and if I get results, I will post them in here.

For now, thank's once more...

Best regards,

Roman