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Altera_Forum
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17 years ago

Dual port RAM in Quartus II 7.2, different behavior on ModelSim than Quartus simulato

I'm using the Quartus II template for a true Dual port RAM with single clock, when I simulate it in Quartus simulator the behavior is ok, and synthsised correctly to the memory bits in a Cyclone III ...
Altera_Forum's avatar
Altera_Forum
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17 years ago

Well, the point of the template is to provide HDL that infers a specific hardware feature. QII won't infer the hardware feature (true dual-port RAM) if you move the writes into the same process. You can always use the Verilog version of the template. It doesn't suffer the same simulation issue.