Altera_ForumHonored Contributor17 years agoDomain crossing of related clocks I have been trying to figure out how to constrain a path of data between a 100MHz clock and a 25MHz clock that is generated by counter driven by the 100MHz clock. I have tried #set_mult...Show More
Altera_ForumHonored Contributor17 years agoThis is what I see if I don't constrain the crossing.mlat_top_level - Path #1- Hold slack is -4.591 (VIOLATED) - Waveform.JPG81 KB
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