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Dangranla's avatar
Dangranla
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1 year ago
Solved

Doesn't generate CXL testbench for example design

Hi, As I follow the《Agilex™ 7 R-Tile Compute Express Link* (CXL*) 1.1/2.0 FPGA IP Design Example User Guide》generate the example desing. Trying to simulate the testbench withe VCS or Questsim, ...
  • RongY_altera's avatar
    RongY_altera
    1 year ago

    Hi,

    Please check if Questa tool is installed and EDA Tool Settings has Questa selected.


    Regards,

    Rong


RongY_altera's avatar
RongY_altera
Icon for Contributor rankContributor
1 year ago

Hi,

Please make sure you have an IP license.

https://www.intel.com/content/www/us/en/products/details/fpga/intellectual-property/interface-protocols/cxl-ip.html#tab-blade-1-0


You can create an empty project based on AGIB027R29A1E1VB. Find CXL IP in IP Catalog then make sure "Simulation" is selected before clicking "Generate Example Design".


In the generated Type 2 example design of my test case, there is a cxl_ed_tb directory containing a tb.zip.



Regards,

Rong



  • Dangranla's avatar
    Dangranla
    Icon for New Contributor rankNew Contributor
    1 year ago

    Hi Rong，
    I've confirmed that I've got the license and "Simulatuion" is selected

    there are not cxl_ed_tb file in neither hardware_test_desing nor intel_rtile_cxl_top_cxltyp2_ed