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Altera_Forum
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11 years ago

Division using STD_LOGIC_VECTOR

Hello everybody, I'm trying to divide two STD_LOGIC_VECTOR variables, but the "/" operator isn't recognized to this type of variable. When I try to multiply using "*" it works, but when I try to...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

for a start, you cannot do arithmatic on a std_logic_vector in standard VHDL (pre 2008) - you need non-standard libraries for that. And they do not include a division function. You need to use the numeric_std library for arithmatic, with is done on unsigned and signed data types.

Your attempts at using integer will not work as there is no fraction in in the integer. eg. 3/2 = 1.

You need to look into the lpm_divider megafunction. It has pipelining that a division function would not.