Forum Discussion
Altera_Forum
Honored Contributor
8 years agothis is what I did in VHDL: what do you think?
1.shift right 5 bits. 2.fill this 5MSBs slope(10 downto 0) <= delta_y (15 downto 5) ; slope(15 downto 11) <= delta_y(15) & delta_y(15) & delta_y(15) & delta_y(15) & delta_y(15);