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Altera_Forum's avatar
Altera_Forum
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15 years ago

Divider maximal frequency

Hello everyone,

I am currently working on Altera's DE2 board with QuartusII 9.0 sp2 Web Edition software.

I'm implementing various architectures of dividers on DE2 board FPGA device (EP2C35F672C6N) and I'm looking on FPGA used space and maximal operational frequency.

So far I have implemented two different architectures (Radix2 non-restoring and sequential) and their parallel and pipeline versions.

For all architectures I can read FPGA used space and maximal operational frequency.

However, when I want to use QuartusII divider wizard and implement lpm_divide I just can read FPGA used space. I can not find maximal operational frequency of so implemented lpm_divider. For maximal operational frequency I use TimeQuest Timing analyzer.

Is there anyone who can help me to resolve my problem and find maximal operational frequency of Altera lpm_divider device?

Thank you very much for your time and effort to help me ! :)

Best regards,

Bojan

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Yes, you have to use the timing analyzer to find the actual speed of the divider design, because it depends e.g. on exact P&R results. Furthermore, the synthesis tool needs to know the timing constraint for an optimal result. There's no other way to predict the speed of your design than synthesizing it, I fear.

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    OK, but when I use TimeQuest analyzer I can't read Fmax. I don't have any timing constraints, I just want to see maximal possible operational frequency. :confused:

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    --- Quote Start ---

    I just want to see maximal possible operational frequency.

    --- Quote End ---

    The Fmax you get without defining timing constraints is basically correct. You can possibly achieve better results with a fully constrained design, using physical (timing driven) synthesis.
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    I have a problem TO GET Fmax using TimeQuest analyzer. :confused:

    When I look in Report Fmax sumary it says to me "No paths to report" (see attachment).
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    --- Quote Start ---

    I have a problem TO GET Fmax using TimeQuest analyzer. :confused:

    When I look in Report Fmax sumary it says to me "No paths to report" (see attachment).

    --- Quote End ---

    Hi,

    TimeQuest calculates Fmax only if you paths between source and destination registers.

    Kind regards

    GPK
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Oh thank you very much men !

    Your reply just gave me the idea to use registers on divider inputs and outputs. The problem is solved. I get 28.85 MHz for maximal operational frequency.

    Thank you very much guys, you are unbelieveable ! ;)

    See you...