Forum Discussion
wenna
New Contributor
New ContributorDirect operations on strings will result in synthesis errors.
Consider the following code, which fails synthesis. module test1 (y, clk);
output wire y;
input wire clk;
wire wire1;
assign wire1 = $signed((~""));
assign y = wire1;
endmodule Howe...
_AK6DN_
Frequent Contributor
Frequent ContributorThe compiler is right, you are wrong.
I'm not even sure what you expect $signed((~"")) to return as a value. It is nonsensical.
You are doing logical bitwise negation on an empty string value. What do YOU expect that to return?
reg str = ""; wire wire1 = $signed(~str);
The first line is valid as it defines a one bit register named str that gets an initial value of "" (whatever that is, probably 1'0b but that is a guess).
The second line is valid as it returns the $signed() of the bitwise complement of a one bit register.
