Differential clock outputs from Cyclone II - How to assign

Question

Is there a way (using Quartus) to output a differential clock from a Cyclone II PLL without getting the "Warning: ... Use PLL dedicated clock outputs to ensure jitter performance" message?

I have assigned the two pins for output to the adjacent PLLn_OUTp and PLLn_OUTn pins. Connecting these pins to the PLL "c0" output, with an inverter on one, results in the usual warning for the inverted pin. Examining the floorplan shows that the inverted signal is routed clear across the chip, and then back.

The ALTIOBUF_OUT megafunction is grayed out in the megawizard (not applicable to Cyclone II?). ALTOUTBUF_DIFF is not grayed out, but generates an error (not allowed for this device type).

There ought to be a way....

Thanks!

Carl

altera_forum · Answer

Use  ddr_out to drive the clock signals out, you can use any two IO pins although it is recommended to use a 'differential' pair.

altera_forum · Answer

The normal way is  to assign a single pin and a differential I/O standard.No MegaFunctions or anything else needed.

altera_forum · Answer

Thanks for the responses:   josyb: Where can I find the ddr_out function/block/primitive ?   fvm: I eventually found a more complete reply from you in another thread. "Select a differential pin pair and assign a differential I/O standard to the positive pin in the Pin Planner or Assignment Editor. the negative pin is assigned by quartus automaticly." - That did the trick!   Carl

altera_forum · Answer

Carl,

you create a ddr_out block with the MegaWizard PlugIn Manager, select ALTDDR_OUT in the 'IO' section.

Driving the clocks out via ddr_out is useful when you are sending the clock along with DDR output data e.g. driving a RTBI (Reduced Ten Bit Interface) as found on some gigabit transceivers. This will keep your clock nicely aligned with the DDR data as then all signals have equal output circuits.

I guess you can do this also with true differential signals, e.g. LVDS (I haven't done/tried this yet).

altera_forum · Answer

--- Quote Start ---

Carl,

you create a ddr_out block with the MegaWizard PlugIn Manager, select ALTDDR_OUT in the 'IO' section.

--- Quote End ---

Hmmm. Maybe there's an issue of allowed devices or Quartus rev?: I'm using Cyclone II and Quartus 9.1sp1. There is no ALTDDR_OUT in the Megawizard, or in Help.

Thanks anyway. The method given by FvM suits my purposes for now.

Carl

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Differential clock outputs from Cyclone II - How to assign

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