Forum Discussion
kikoss
Occasional Contributor
Occasional ContributorDifferential CLK input handle
Hello I have a a differential clk come in to FPGA agilex7 F series Want to use it as a single clk to the design Iam using quartus 24 .1 pro Which good practice is recommended ? i see on a d...
- Hi,
yes. Same procedure for other differential in- and outputs.
kikossOccasional Contributor
Occasional Contributori will explain why using separate ports
i have an ADC convertere that send data to the FPGA
it interface from the ADC to the FPGA is . clk , and data as on the image
As you see the DCO CLK that go the FPGA is a differential pair .
So how to handle this differential pair on FPGA ? The ALT_INBUF_DIFF primitive is supported only for Stratix® III and Cyclone® III devices . and Iam not using those devices
THX
