Forum Discussion
kikoss
Occasional Contributor
Occasional ContributorDifferential CLK input handle
Hello I have a a differential clk come in to FPGA agilex7 F series Want to use it as a single clk to the design Iam using quartus 24 .1 pro Which good practice is recommended ? i see on a d...
- Hi,
yes. Same procedure for other differential in- and outputs.
kikossOccasional Contributor
Occasional ContributorYes but suppose , I have on TOP level , clkin_p , clkin_n , and suppose i assign them to external pins
What to connect to inclock port of the adc contoller ?
Thx
FvM
Super Contributor
Super ContributorWhy are you using separate clkin_p and clkin_n pins in the port definition? The usual way is to have a single ended logical port and assign a differential pin pair. You can use an ALT_INBUF_DIFF low level primitive to do the translation but it has no benefit for standard differential inputs.
