Forum Discussion
Altera_Forum
Honored Contributor
8 years ago --- Quote Start --- It's actually quite common in GPU programming, usually we use a warm-up kernel to get around the power-saving status so we can measure the correct runtime, haven't encounter this on my Arria10 FPGA though. --- Quote End --- GPUs usually run a low-clock when idle to save power, that is why a warm-up run is required to force the GPU out of idle mode to get correct timing. However, this does not apply to FPGAs and I have certainly never encountered such behavior either.