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Altera_Forum
Honored Contributor
11 years agoThanks Ted, that did the trick! All I had to do was open and save: Tools | Qsys | filename.qsys | Open | File | Save.
I neglected to mention the other five error messages (or is it only three), which I hoped would go away when the device ID was correct but did not. Hoping you have some guidance with these too:Error (12252): Port object altpll_avalon|altpll inst sd1|clk of width 5 is being assigned the port altpll_avalon|altpll inst sd1|stratixii_pll inst pll7|clk of width 3 which is illegal, as port widths dont match nor are multiples. CAUSE : The port widths are mismatched in the mentioned assignment. The port widths of the connected ports should match or the LHS port width should be a multiple of the RHS port width. ACTION : Check the port widths of the connected ports. Logical operation results in a porERROR
Error (12252): Port object altpll_avalon|altpll inst sd1|clk of width 5 is being assigned the port altpll_avalon|altpll inst sd1|stratixii_pll inst pll7|clk of width 3 which is illegal, as port widths dont match nor are multiples. CAUSE : The port widths are mismatched in the mentioned assignment. The port widths of the connected ports should match or the LHS port width should be a multiple of the RHS port width. ACTION : Check the port widths of the connected ports. Logical operation results in a porERROR
Error (12153): Can't elaborate top-level user hierarchy
Error: Quartus II 64-Bit Analysis & Synthesis was unsuccessful. 3 errors, 24 warnings
Error: Peak virtual memory: 507 megabytes
Error: Processing ended: Sun May 04 20:25:23 2014
Error: Elapsed time: 00:01:07
Error: Total CPU time (on all processors): 00:00:54
Error (293001): Quartus II Full Compilation was unsuccessful. 5 errors, 24 warnings