Determining path for cell in netlist

After all of this discussion, I've finally been able to add the clock constraints to the SDC file. However, I'm still having a problem. TimeQuest is now reporting this:

info: the source clock for this clock assignment cannot be reached. clock: health_status_i2c_clk might not have valid arrival time.

I'm using this command to create the generating clock:

create_generated_clock -name {health_status_i2c_clk} -divide_by 1024 -source [get_ports {osc_clk0}] [get_pins inst2|inst8|i2c_clk|regout]

The clock that feeds the i2c_clk register is called clk50_mhz, which is a propagated clock from the Nios processor. The command derive_pll_clocks -use_tan_name is currrently being used. A base block is created on the input to the Nios processor, so I'm at a lost as to why I'm getting this message.