Detecting a tansition in a signal

Because you have used <= (less than or equal) in your compare, it is comparing a single bit to a single bit with a less than doesnt really mean much. KEY(0) <= '0' is always true when KEY = '0', and PrevKey <='1' is true when PrevKey is '0' or '1', so the equation can be reduced to:

if key(0) = '0' then
  counter <= counter + 1;
end if;

PS. Have you debounced your keys elsewhere? you may get several increments of counter without debouncing the key presses.

As a beginner, I also recommend you get into the habit of not using std_logic_unsigned. It is a non standard VHDL package. Numeric std is the real IEEE standard.