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JoEl's avatar
JoEl
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Design partition with HSSI and DDR IPs

Hello,

We starting with new project on Arria 10 GX 900 to 1150. Project is basically video switching matrix so many transcievers are used. I want to devide it to partitions to cut compilation time for components but I am not able to place NATIVE PHY out of root partition - compiler says:

Error(19733): The following instances of HSSI Transceiver periphery IP are not in the root partition. Remove any instances of this IP in a non-root partition.

Error(19733): The following instances of External Memory interface periphery IP are not in the root partition. Remove any instances of this IP in a non-root partition.

So nor NATIVE PHY nor EMIF can't be out of root.

So I decided to lock main design and add features around of it, but when I select it as partition, same warning pops out. What am I doing wrong ? did I missed something here ?

How can I make partiton from ie. HDMI Intel core from example?

Best regards,

Josef

3 Replies

  • KennyT_altera's avatar
    KennyT_altera
    Icon for Super Contributor rankSuper Contributor
    6 years ago

    May I know which version of Quartus you are using? Quartus Pro or Quartus Standard? As each of them have a different flow.

  • JoEl's avatar
    JoEl
    Icon for Occasional Contributor rankOccasional Contributor
    5 years ago

    Sure, we do use Quartus Pro 19.1.0 Build 240

    So partition selection and LogiLock design implementation have different flow? Interesting, can you describe differences?