Design partition with HSSI and DDR IPs

Yes, if you are using std, you do not need to separate out the design partition for root and core.

If you are using Pro, you will need to separate out this two partition. For your case, you can follow the tutorial mention here:

https://www.intel.com/content/www/us/en/programmable/documentation/lyx1569936504360.html

But you need to upgrade your design to Q19.3. remember to back up your design before upgrade.