Forum Discussion
JoEl
Occasional Contributor
Occasional ContributorDesign partition with HSSI and DDR IPs
Hello, We starting with new project on Arria 10 GX 900 to 1150. Project is basically video switching matrix so many transcievers are used. I want to devide it to partitions to cut compilation time...
KennyT_altera
Super Contributor
Super ContributorYes, if you are using std, you do not need to separate out the design partition for root and core.
If you are using Pro, you will need to separate out this two partition. For your case, you can follow the tutorial mention here:
https://www.intel.com/content/www/us/en/programmable/documentation/lyx1569936504360.html
But you need to upgrade your design to Q19.3. remember to back up your design before upgrade.
