Forum Discussion
Sruthy
New Contributor
2 years agoDesign Compilation Error in quartus prime
Hi, I am beginner to quartus prime. I am facing an error as shown below: ID:21358 Verilog HDL error at <location>: '<string>' is not a port but the port is already declared as input Error(21358):...
RichardT_altera
Super Contributor
2 years agoWithout looking at the code, it is hard to debug what might cause the error.
Please share the design file or project (Project > Archive Project) that could duplicate the error.
Regards,
Richard Tan