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Altera_Forum
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11 years ago

Design assistant upgrade behavior

I have upgraded my development environment from quartus ii 32bit 12.0sp2 build 263 web edition to quartus ii 32bit 13.1.0 build 162 web edition. Now the same project on the newest environment r...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

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You don't need to do any major work. Just check one single case to see which tool is not telling the truth. I expect the one that tells you is right and the one that didn't was not efficient enough.

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I did it for some of such issues: it seems in all cases related to data transfer between two different clock domains, both generated by the same PLL, 160MHz and 40MHz.

Aren't the two generated by same PLL synchronous?