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Altera_Forum's avatar
Altera_Forum
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11 years ago

DESCRIPTOR MEMORY for SGDMA is not defined in system.h file

Hi everyone,

I am new to altera and FPGA programming. I want to use two SGDMA for transfer and receive of data from a TSE ip core. For that I am using a separate Descriptor memory along with the primary onchip memory. But after generation the .sof and .sopcinfo files, the DESCRIPTOR MEMORY is not defined in the system.h file.

I am not using any dedicated memory controllers, is that could be the reason? Also the .sof file automatically has time_limited as name. I checked few posts regarding that issue here, but couldn't find a fix. Has that got to do anything with descriptor memory problem?

Your reply is much appreciated, I have a deadline and I am already lagging.

Thank you very much.

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    If any clarification needed, please let me know. I am stuck with my work. Any kind of suggestions are highly appreciated.

  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Post a picture of your qsys system. Is your descriptor memory and csr (control status register) connected as avalon slaves to NIOS's data master?

  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Hi @krasner ,

    Thanks for the reply. That issue got solved. I changed the base address of the descriptor memory and regenerated the .sopcinfo file. Can't tell though if the address was the culprit.

    I have got another problem. Whenever I try to download the software on to the FPGA, it gives the following error.

    --> "Downloading ELF Process failed." When I check the 'Run Configurations', it gives shows the following,

    --> "The expected Stdout device name does not match the selected target byte stream device name."

    Can you help me on this? I have tried regenerating the BSP, still the problem persists. The output .sof file shows time_limited. Has that anything to do?
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    You are probably using the Web edition of quartus. If you don't have a license, you can't use /s or /f nios without the time_limited warning. When you download your time_limited sof onto the FPGA, there will be a pop up window that pops up. Don't close that window. Then you should be able to download the ELF file.

    Or you can switch to the /e version of nios.