Demultiplexor Megafunction?

I tried compiling a 32 bit example of it, but I have an error:

Error (10500): VHDL syntax error at testvhdl.vhd(12) near text ")";  expecting an identifier, or "constant", or "file", or "signal", or "variable"

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity demux32_4 is
port (
      out0 : out  std_logic_vector(31 downto 0);   --output bit
      out1 : out std_logic_vector(31 downto 0);   --output bit
       out2 : out std_logic_vector(31 downto 0);   --output bit
      out3 : out std_logic_vector(31 downto 0);   --output bit
       sel : in std_logic_vector(31 downto 0);
       bitin : in  std_logic_vector(31 downto 0);   --input bit
     );
end demux32_4;
architecture Behavioral of demux32_4 is
begin
process(bitin,sel)
begin
out0 <= '00000000000000000000000000000000';
out1 <= '00000000000000000000000000000000';
out2 <= '00000000000000000000000000000000':
out3 <= '00000000000000000000000000000000';
case sel is
  when "00" => out0 <= bitin;
  when "01" => out1 <= bitin;
  when "10" => out2 <= bitin;
  when others => out3 <= bitin;
end case; 
end process;
end Behavioral;