define multicycle path on specific instant

Thanks for the fast reply

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for a start, are you sure the data will be aligned correctly? you need to make sure the data is set up 2 clock cycles before the enable is high to ensure that the setup time wont be violated with these slack paths.

Yes, I guarantee the data alignment.

It might be easiest to just tell it to look for all registers in the path with wildcards:

set_multicycle_path -from [get_keepers {ent_name:inst_name|my_slow_entity:slow_entity_inst|*}] -to [get_registers {ent_name:inst_name|my_slow_entity:slow_entity_inst|*}] -setup 3

set_multicycle_path -from [get_keepers {ent_name:inst_name|my_slow_entity:slow_entity_inst|*}] -to [get_registers {ent_name:inst_name|my_slow_entity:slow_entity_inst|*}] -hold 2

This will then only get applied to valid paths - any connections that dont exist will be ignored (so if you have the registers A -> B -> C, it wont set up a path from A -> C because that connection doesnt exist).

Would U please rewrite the constraint with the specified hierarchy in my first post ? I just got confused just reading the syntax. I'm using VHDL, the instant name is fpu1 and the instantiated module is fpucorr =>

 fpu1 : fpucorr
port map (
....); 

Also I have other questions:

Will the wildcards make the constraint propagate inside the fpu1 hierarchy ?

Why did U choose 3 for setup and 2 for hold ?

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Thanks in advance