Forum Discussion
Altera_Forum
Honored Contributor
10 years ago --- Quote Start --- Thanks for the reply. The ideal solution would be writing from the FPGA to the SDRAM and then reading it from the HPS. I have no idea how to even start doing this though. Do you know of any tutorial/source code/example I could look at that demonstrates this? Thanks! --- Quote End --- Learn about the Avalon bus that QSYS uses. You will write code to implement an Avalon master to talk to the f2h_sdram bridge that is implemented by the HPS. To connect it together, you will need to create a custom QSYS component to contain your code. Your component will need to implement an Avalon master and whatever other I/O it needs. There are several tutorials on how to do this on altera.com. It is also covered in the QSYS documentation which I would recommend reading.