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Altera_Forum's avatar
Altera_Forum
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12 years ago

De 3 pin assignment challenge

I implemented a simple logic(AND gate) and from my observation, apart from LED (LEDR(7)) that was assigned for output another LED (LEDR(4)) would come on alongside. In addition the 2-input AND gate seems to behave like a NAND, two HIGH = "no output", HIGH and LOW = "output", two LOW = "output". (note that "output" is shown at the assigned LED and another LED comes up alongside). But when "no output" none of them come up. Any help on this pls?

Compiler warning shows "Warning: Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details".

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    I guess the LEDs on DE3 board are driven from the cathode side, like in most designs. So, they turn on when the driving output is low and the NAND behaviour you observe is pretty normal.

    Regarding the I/O assignment, open the Quartus pin assignment editor and check if your top level I/O names match with the assigned ones.
  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    Thanks for that info.... but do u know how i can set the DE3 board to be driven from the anode side. Regarding the I/O assignment, my top level I/O names are assigned and that output pin indicates (cathode driven), however a pin assigned to unknown name by the compiler (ASSIGNMENT>PINS>ASSIGNABLE PINS) comes up alongside.

    --- Quote Start ---

    I guess the LEDs on DE3 board are driven from the cathode side, like in most designs. So, they turn on when the driving output is low and the NAND behaviour you observe is pretty normal. Regarding the I/O assignment, open the Quartus pin assignment editor and check if your top level I/O names match with the assigned ones.

    --- Quote End ---

  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    --- Quote Start ---

    but do u know how i can set the DE3 board to be driven from the anode side.

    --- Quote End ---

    SEI059

    :wacko: You can't ! That's a matter of how LED are physically connected on the board pcb.

    I you don't like the inverted behaviour, simply place a NOT gate just before the output pad.
  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    Alright... done just that; works like wat i wanted. What about the other question, any idea as to why another pin is triggered alongside the assigned output, and what can b done to solve it?

    --- Quote Start ---

    SEI059

    :wacko: You can't ! That's a matter of how LED are physically connected on the board pcb.

    I you don't like the inverted behaviour, simply place a NOT gate just before the output pad.

    --- Quote End ---

  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    The incomplete I/O assignments warning usually means you defined an I/O port in your top level, but you didn't assigned it to any pin.

    On device with configurable drive strength and slew rate (loke CIII), this warning also appear when you leave these parameters to the default value.

    Regarding the unknown pin appearing in the pin assignments, maybe it was an old I/O pin which was later removed, so the assignment is still there but refers to an unexistent signal: you simply need to remove the assignment line from the pin planner.
  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    But i program via JTag and if there is an old I/O pin i expect it to be cleared off when device is switched off.

    --- Quote Start ---

    The incomplete I/O assignments warning usually means you defined an I/O port in your top level, but you didn't assigned it to any pin.

    On device with configurable drive strength and slew rate (loke CIII), this warning also appear when you leave these parameters to the default value.

    Regarding the unknown pin appearing in the pin assignments, maybe it was an old I/O pin which was later removed, so the assignment is still there but refers to an unexistent signal: you simply need to remove the assignment line from the pin planner.

    --- Quote End ---