Forum Discussion
Altera_Forum
Honored Contributor
8 years agoHi,
Debug individual blocks so you can find the mistake. Understand the timing diagram from the https://www.altera.com/en_us/pdfs/literature/ug/archives/ug-fifo-15.1.pdf and try to compare with your code. Can you attach .v file. Anand Raj Shankar (This message was posted on behalf of Intel Corporation)