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Altera_Forum's avatar
Altera_Forum
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13 years ago

Data+clk path through (constraints)

Hi, Im trying to specify timing constraints for a simple design but i dont know how to fully complete the constraints. I still have unconstrained paths: 'clk_in' and 'clk_out' rep...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

I actually tried your code earlier and ended up with same issue. Data are constrained. clocks are defined but timequest thinks of clock_in and clock_out as if data path. I personally wouldn't care about tool's behavior here but would like to know why it is behaving like that. Your code is a good model to see timequest at a very basic but useful level.