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Altera_Forum
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14 years ago

Data memory using LPM_RAM_DQ

Hi all! I have a problem in using LPM_RAM_DQ to make a datamemory for MIPS Pipeline R3000. I've tried the following VHDL code : entity data_memory is port ( clock : in std_logic; ...
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Altera_Forum
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14 years ago

address width of 32 bits means 2^32 ram depth each location at 32 bits.

i.e. trillion bits. Phenomenal size for fpga.