Cyclone IV GX: Output Skew at DDR LVDS Output

Many thanks for your reply. I am really happy that my constraints are correct and I know where I stand. But when reading your explanation some other question appeared to me.

Is there a way to get proper timing results or other information? Well a Interface between two Cyclone IV GX might work as there is enough receiver skew margin even when the real output skew would be +/-350ps. A smaller value would be better but that is how it is - I can live with that. But how can one get an estimation of the real values. I am asking because I also have a receiver that connot handle the above mentioned +/- 350 ps at its input but may be able to tolerate +/- 150 ps.

So what I keep asking myself is how can I be sure to meet timing if I don't know anything about it except a worst case that will hopefully never appear in the real world since the receiver cannot tolerate it. I don't need an exact value but should I base my calculations on the TCCS Value (anyway, is this the right value?), those typical +/-100ps seen in some application note, any other value, or is there some rule of thumb to get a raw estimate for the actual value.

Thank you and have a pleasat weekend :)