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Altera_Forum
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17 years ago

Cyclone III SerDes: FPGA to FPGA

Good afternoon people, I am currently trying to determine if the SERDES capability of the Cyclone III EP3C120F780 will work for me. The plan is to have a single Cylone III act as a "master...
Altera_Forum's avatar
Altera_Forum
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17 years ago

Did you manage to get it solved? I also do use an LVDS connection between 2 CycloneIII fpga's (4 pairs data and 1 clock, deser factor 4... data=16bit 60MHz, ALTLVDS with PLL) and I'm using a syncword of 0000, FFFF, 0000. Simulation in modelsim is everything ok, but in practice I sometimes do not get any sync.

The PLL is in lock and if I measure on the lvds channels I can recognize the FFFF sync word...

I'm really interested how you did solved your FPGA - FPFA LVDS connection.