Honored ContributorHi, pls look at the following error message. ive searched the web and i can't find anything to help.
Error: Assertion error: can't convert rom for cyclone II device family using altsyncram function megafunction because Cyclone II supports only synchronous rom. How can i fix this problem? pls help this is urgent :confused: the Rom and the memory initialization files are included in the zip file. Kind Regards dante
Honored ContributorInstead of searching the web, you may want to ask the RAM Megafunction User Guide. It tells:
--- Quote Start --- For the Stratix and Cyclone series of devices, only synchronous RAM is supported. For other devices, you can use synchronous or asynchronous single-port RAM. --- Quote End --- You have manually instantiated a ROM without a clock, or in other words, an asynchronous ROM. But it's not available with Cyclone II and any other newer FPGA families. By implementing the ROM through the MegaWizard, you can only choose port and parameter combinations, that are supported for the respective device family.Honored ContributorHonored ContributorIs it possible to convert asynchronous rom to synchronous rom?
Honored ContributorI don't understand, what's your problem with the output assignment of the MegaWizard? But however you create the design, it must have a clock in addition to the signals used in your ROM instance.
Honored ContributorThank you FvM, my problem is sorted.:)
Regards Dante
