customized component got overwriten

I don't understand. Your source code file (.v or .vhd) is getting overwritten and reverted back to a prior state? Do you mean the _hw.tcl file is getting overwritten?

In any case, if you make changes to a custom component's source code, it's a good idea to go back into the Component Editor (right click the component in the IP Catalog and select Edit), re-analyze the design on the Files tab, and click OK to recreate the _hw.tcl file.

I think some more detail about exactly what is wrong is required here.

Most likely, for a custom component like the one you have produced, Qsys "generate" results in copying source files from their original locations to the (e.g.) synthesis/submodules/ directory of your project outputs.

The "solution" is of course to only modify the sources, and not their copies located within the synthesis/submodules/ folder.

But then you get caught up in the fact that modifying the source then requires you to re-generate Qsys before you invoke Quartus synthesis.

From the sounds of it, when you state that Quartus is picking up old files and overwriting your modified files, if you have added the .qsys file to Quartus then Quartus will execute the Qsys generate prior to synthesis.

So...

a) if your .qsys is added to your Quartus project, then just modify the component source files and not the files in synthesis/submodules.

b) if you have added the Qsys created .qip file to your Quartus project, then again you should just modify the source to your component and not the synthesis/submodules/ copies, BUT you need to Qsys generate before each Quartus recompile.

c) if you have added the Qsys created .qip and haven't performed a Qsys generate, then I don't know what your problem is....

Yes, I make changes to my source code (*.v), and start compilation. The source code was reverted back to prior state. I have to make the change again, then the changes stay. It doesn't matter if I run the component analysis or not, nor re-generate the HDL code in the QSYS helps. It's like deja vu all day. Don't know what is wrong with the Quartus.

I'm using Quartus Lite 16.1, working on DE1 evaluation board . I added a customized AVMM slave component in the GHRD.

This sounds more likely. I'll check those items. Thanks for all those detail info.

Peng

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Most likely, for a custom component like the one you have produced, Qsys "generate" results in copying source files from their original locations to the (e.g.) synthesis/submodules/ directory of your project outputs.

The "solution" is of course to only modify the sources, and not their copies located within the synthesis/submodules/ folder.

But then you get caught up in the fact that modifying the source then requires you to re-generate Qsys before you invoke Quartus synthesis.

From the sounds of it, when you state that Quartus is picking up old files and overwriting your modified files, if you have added the .qsys file to Quartus then Quartus will execute the Qsys generate prior to synthesis.

So...

a) if your .qsys is added to your Quartus project, then just modify the component source files and not the files in synthesis/submodules.

b) if you have added the Qsys created .qip file to your Quartus project, then again you should just modify the source to your component and not the synthesis/submodules/ copies, BUT you need to Qsys generate before each Quartus recompile.

c) if you have added the Qsys created .qip and haven't performed a Qsys generate, then I don't know what your problem is....

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Ted, thanks for all those clues. What I found out matches what you said.

Basically, when I double click the module under Project Navigator. It brought up the file in the synthesis/submodules/ directory, which is a copy of the original source code. That explains the reason that any change in this file did go to the original source code.

BTW, when you check the file property of the module in the project navigator. It actually points to the original source code, not the file synthesis directory. That's kind of miss-leading.

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Most likely, for a custom component like the one you have produced, Qsys "generate" results in copying source files from their original locations to the (e.g.) synthesis/submodules/ directory of your project outputs.

The "solution" is of course to only modify the sources, and not their copies located within the synthesis/submodules/ folder.

But then you get caught up in the fact that modifying the source then requires you to re-generate Qsys before you invoke Quartus synthesis.

From the sounds of it, when you state that Quartus is picking up old files and overwriting your modified files, if you have added the .qsys file to Quartus then Quartus will execute the Qsys generate prior to synthesis.

So...

a) if your .qsys is added to your Quartus project, then just modify the component source files and not the files in synthesis/submodules.

b) if you have added the Qsys created .qip file to your Quartus project, then again you should just modify the source to your component and not the synthesis/submodules/ copies, BUT you need to Qsys generate before each Quartus recompile.

c) if you have added the Qsys created .qip and haven't performed a Qsys generate, then I don't know what your problem is....

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