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Altera_Forum
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12 years ago

Customize pattern generator created in Qsys

I did a design for Stratix V GX FPGA in order to transmit 3 independent channels. This design was created using qsys, also the pattern generator and the pattern_checker were created in qsys. Now I ne...
Altera_Forum's avatar
Altera_Forum
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12 years ago

Thanks Dave, Could you give some advices how can I simulate? I am really new in simulations, actually I am new working with FPGAs :).

Which simulation tool would be the best for simulate this design? Modelsim? Should I simulate every block separately? Should I simulate only the memory?Do you know any manual for beginners?

Thanks