Altera_ForumHonored Contributor12 years agoCustomize pattern generator created in Qsys I did a design for Stratix V GX FPGA in order to transmit 3 independent channels. This design was created using qsys, also the pattern generator and the pattern_checker were created in qsys. Now I ne...Show More
Altera_ForumHonored Contributor12 years ago --- Quote Start --- Any idea how could I fix this problem? --- Quote End --- You should first simulate the design :) Cheers, Dave
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