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Altera_Forum's avatar
Altera_Forum
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18 years ago

Critical Delay in TimeQuest Timing Analyzer

Hello, I'm trying to identify the critical path of a sequential circuit using the TimeQuest Timing Analyzer. However, I'm facing some dificulties because the tool doesn't provide, as the Classi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Have you given TimeQuest timing constraints? If you are working with the TimeQuest GUI, there are canned reports in the Tasks pane (double click them to run them), some of which include clock setup. You must have constraints before the reporting commands will display anything.

If you have not constrained your clocks and have a PLL, you can start with "derive_pll_clocks -create_base_clocks". See the documentation to learn how to fully constrain your design.