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Altera_Forum
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16 years ago

Creating partition issue

Hi guys: There is a mudule with bidrection pins (inout defined in VHDL) in my design, QII gave out error informations about this module when i created partition for this module. ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

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Hi guys:

There is a mudule with bidrection pins (inout defined in VHDL) in my design, QII gave out error informations about this module when i created partition for this module.

I refered the QII handbook and didn't find the any restricts about this situation. Do anyone encouter this issue, and how to deal with it?!

Thanks in advance!

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Hi Jerry,

maybe this is the reason for your problem.

Altera FPGA's do not have internal tristate buffer. The tristate function is replaced by a multiplexer structure by Quartus. The implementation of the muxes will change the interface of your module, but when you define your block as partition Quartus is not allowed to change the interface of the module. The interface of a module in a design partitiion is strictly preserved.

Kind regards

GPK