Altera_Forum
Honored Contributor
15 years agoCPLD PFL vs NIOS FLASH Programmer
Hi,
I encounter a problem to configure a EPS2180 on a custom board with the NIOS Flash Programmer. Here is the Hardware config : - FPGA configured at power up by a MAX2 CPLD including a PFL - CFI Spansion 256GL 16 bits FLASH memory used to store 2 pages of .sof + NIOS .elf - PFL option bits address is 0x0, P0 page at 0x2000, P1 page at 0x62000 - MSEL pins all fixed at GND on board (parallel programming without compression) Now the SW config : - Quartus 9.1 + NIOS EDS 9.1 (no SP applied) - no firmware compression specified in Quartus - --pfl --optionbit=0x0 specified in the script of the sof2flash utility Results: - Pages + option bits correctly programmed by Quartus Programmer after .sof to .pof conversion (FPGA configuration + boot of the NIOS OK) - NIOS ELF correctly programmed by Flash Programmer - P0 and P1 updates by NIOS Flash Programmer seems OK at the console during and after programmation (checksum control OK) but the FPGA is not configured by the CPLD at next power up (confdone doesn't rise up). So my question : What could be the reasons the CPLD's PFL fail to configure the FPGA after an update of the FLASH by the FLASH Programmer ? Thanks in advance.